师资

林龙扬
助理教授
linly@sustech.edu.cn

个人简介

林龙扬博士,于2018年获得新加坡国立大学博士学位,2018-2021年于新加坡国立大学任博士后研究员,2021年5月加入南方科技大学深港微电子学院。林龙扬博士长期从事超低功耗、高能效、超大规模集成电路设计,在先进CMOS工艺成功进行了超过10次流片,积累了丰富的芯片设计经验。

林龙扬博士累计发表论文超过20篇,包括以第一作者多次将研究成果发表在集成电路设计权威期刊 IEEE Journal of Solid-State Circuits 以及会议“芯片奥林匹克” ISSCC上,已出版专著1本,专利申请2项。他还是国际知名期刊IEEE Transactions on Very Large Scale Integration (VLSI) Systems和IET The Journal of Engineering的副编辑。

 

招聘信息

林龙扬博士课题组常年招聘博士后、科研助理,招收博士生、硕士生、本科实习生,有意应聘者请将简历(格式PDF)发送至以下邮箱,以“招聘岗位_应聘者姓名”为题。

联系方式:linly@sustech.edu.cn

 

教育经历

2018年,新加坡国立大学,博士学位

2013年,瑞典隆德大学,硕士学位

2011年,深圳大学/瑞典于默奥大学,双学士学位

 

工作经历

2021年5月至今,南方科技大学,助理教授

2018年8月至2021年4月,新加坡国立大学,博士后研究员

2017年5月至2017年8月,意大利都灵理工大学,访问学者

2013年12月至2014年8月,新加披国立大学,研究工程师

 

获得奖项

ISSCC Demonstration Session Certificate of Recognition,2020

IEEE SSCS Singapore Chapter Award,2017 & 2018

ISSCC Student Travel Grant Award, 2017

 

研究方向

超低功耗数字集成电路设计

高能效人工智能处理器设计

多传感器融合芯片设计

集成电路硬件安全

 

代表性论文

International Journals

[J1] L. Lin, S. Jain, M. Alioto, “Sub-nW Microcontroller with Dual-mode Standard Cells and Self-startup for Battery-Indifferent Sensor Nodes”, IEEE Journal of Solid-State Circuits (JSSC), vol. 56, no. 5, pp. 1618-1629, May 2021, doi: 10.1109/JSSC.2020.3038115.

[J2] L. Fassio, F. Settino, L. Lin, R. De Rose, M. Lanuzza, F. Crupi, M. Alioto, "A Robust, High-Speed and Energy-Efficient Ultralow-Voltage Level Shifter," in IEEE Transactions on Circuits and Systems II: Express Briefs, early access, doi: 10.1109/TCSII.2020.3033253.

[J3] S. Jain, L. Lin, M. Alioto, "Broad-Purpose In-Memory Computing for Signal Monitoring and Machine Learning Workloads," in IEEE Solid-State Circuits Letters, vol. 3, pp. 394-397, 2020, doi: 10.1109/LSSC.2020.3024838.

[J4] S. Jain, L. Lin, M. Alioto, “Drop-In Energy-Performance Range Extension in Microcontrollers Beyond VDD Scaling”, in IEEE Journal of Solid-State Circuits (JSSC), vol. 55, no. 10, pp. 2670-2679, Oct. 2020, doi: 10.1109/JSSC.2020.3005778.

[J5] L. Lin, S. Jain, M. Alioto, “Integrated Power Management for Battery-Indifferent Systems with Ultra-Wide Adaptation down to nW”, in IEEE Journal of Solid-State Circuits (JSSC), vol. 55, no. 4, pp. 967-976, April 2020, doi: 10.1109/JSSC.2019.2959742.

[J6] S. Jain, L. Lin, M. Alioto, “Automated Design of Reconfigurable Micro-Architectures for Accelerators under Wide Voltage Scaling”, in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 28, no. 3, pp. 777-790, March 2020, doi: 10.1109/TVLSI.2019.2950959.

[J7] L. Lin, S. Jain, M. Alioto, "Reconfigurable Clock Networks for Wide Voltage Scaling," in IEEE Journal of Solid-State Circuits (JSSC), vol. 54, no. 9, pp. 2622-2631, Sept. 2019, doi: 10.1109/JSSC.2019.2925269.

[J8] O. Aiello, P. Crovetti, L. Lin, M. Alioto, “A pW-Power Hz-Range Oscillator Operating with a 0.3V-1.8V Unregulated Supply”, in IEEE Journal of Solid-State Circuits (JSSC), vol. 54, no. 5, pp. 1487-1496, May 2019, doi: 10.1109/JSSC.2018.2886336.

[J9] S. Jain, L. Lin, M. Alioto, “Dynamically Adaptable Pipeline for Energy-Efficient Microarchitectures under Wide Voltage Scaling,” in IEEE Journal of Solid-State Circuits (JSSC), vol. 53, no. 2, pp. 632-641, Feb. 2018, doi: 10.1109/JSSC.2017.2768406.

[J10] S. Jain, L. Lin, M. Alioto, “Design-Oriented Energy Models for Wide Voltage Scaling down to the Minimum Energy Point,” in IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), vol. 64, no. 12, pp. 3115-3125, Dec. 2017, doi: 10.1109/TCSI.2017.2736540.

International Conferences

[C1] L. Lin, S. Jain, M. Alioto, “Multi-Sensor Platform with Five-Order-of-Magnitude System Power Adaptation down to 3.1nW and Sustained Operation under Moonlight Harvesting”, 2020 Symposium on VLSI Circuit, Honolulu, HI, USA, 2020, pp. 1-2, doi: 10.1109/VLSICircuits18222.2020.9162898.

[C2] L. Fassio*, L. Lin*, R. Rose, M. Lanuzza, F. Crupi, M. Alioto, “A 0.25-V, 5.3-pW Voltage Reference with 25-µV/oC Temperature Coefficient, 140µV/V Line Sensitivity and 2,200-µm2 Area in 180nm”, 2020 Symposium on VLSI Circuit, Honolulu, HI, USA, 2020, pp. 1-2, doi: 10.1109/VLSICircuits18222.2020.9162872. (*equally credited authors)

[C3] J. Li, Y. Dong, J. Park, L. Lin, T. Tang, M. Zhang, H. Wu, L. Zhang, J. S. Y. Tan, J. Yoo “Human-Body-Coupled Power-Delivery and Ambient-Energy-Harvesting ICs for a Full-Body-Area Power Sustainability”, 2020 IEEE International Solid- State Circuits Conference - (ISSCC), San Francisco, CA, USA, 2020, pp. 514-516, doi: 10.1109/ISSCC19947.2020.9063042.

[C4] S. Jain, L. Lin, M. Alioto, “Drop-In Energy-Performance Range Extension in Microcontrollers Beyond VDD Scaling”, 2019 IEEE Asian Solid-State Circuits Conference (A-SSCC), Macau, China, 2019, pp. 125-128, doi: 10.1109/A-SSCC47793.2019.9056919.

[C5] L. Lin, S. Jain, M. Alioto, “Integrated Power Management and Microcontroller for Ultra-Wide Power Adaptation down to nW”, 2019 Symposium on VLSI Circuit, Kyoto, Japan, 2019, pp. C178-C179, doi: 10.23919/VLSIC.2019.8778085.

[C6] L. Lin, S. Jain, M. Alioto, “A 595pW 14pJ/cycle Microcontroller with Dual-mode Standard Cells and Self-startup for Battery-Indifferent Distributed Sensing”, 2018 IEEE International Solid- State Circuits Conference - (ISSCC), San Francisco, CA, 2018, pp. 44-46, doi: 10.1109/ISSCC.2018.8310175.

[C7] L. Lin, K. Trinh Quang, M. Alioto, “Transistor Sizing Strategy for Simultaneous Energy-Delay Optimization in CMOS Buffers”, 2017 IEEE International Symposium on Circuits and Systems (ISCAS), Baltimore, MD, 2017, pp. 1-4, doi: 10.1109/ISCAS.2017.8050997.

[C8] L. Lin, S. Jain, M. Alioto, “Reconfigurable Clock Networks for Random Skew Mitigation from Sub-Threshold to Nominal Voltage”, 2017 IEEE International Solid- State Circuits Conference - (ISSCC), San Francisco, CA, 2017, pp. 440-441, doi: 10.1109/ISSCC.2017.7870450.